One H200, 31 Suppliers — Who Actually Makes an AI Chip?
If you only read earnings headlines, AI chips look like a one-company story. Nvidia reports another blowout quarter, hyperscalers raise capex again, and the comment section argues about valuation. Fair enough — Nvidia is the name on the purchase order.
But when a cloud region delays a GPU cluster, the excuse is often messier: memory stacks not qualified yet, CoWoS slots pushed to next quarter, substrate lead times. That’s not “Nvidia sold out” in the abstract. It’s a specific factory step stuck somewhere in a chain of about 31 suppliers. This piece walks through that chain first — what an H200 actually is, where it gets stuck — and only then adds a scoreboard for who holds power. The scores are a summary, not the whole story.
What an H200 is (beyond the logo)
The H200 is Nvidia’s data-center GPU built for heavy AI training and inference. On paper the specs are simple enough: a GH100-class compute die plus 141 GB of HBM3e memory, with about 4.8 TB/s of memory bandwidth (Nvidia’s product sheet). The bandwidth number matters more than it used to. Modern AI models are often memory-bound — the GPU can crunch fast, but feeding it data from memory is the bottleneck. That’s why Nvidia stacks high-bandwidth memory (HBM) right next to the die instead of using regular DRAM modules.
Nvidia designs the architecture and writes the software story (CUDA, libraries, the whole ecosystem). It does not print the silicon, stack the memory, or bond the two together in a package you can plug into a server. Those steps live in other companies’ fabs and packaging lines — mostly in Taiwan and Korea, with equipment and materials coming from Japan, Europe, and the US.
Thirty-one names, four layers
A Sankey-style map of one H200 traces roughly 31 suppliers across four layers. Think of it bottom-up.
Layer 1 — materials and parts. The unglamorous stuff: photoresist from JSR, industrial gases from Linde and Air Liquide, silicon wafers from Shin-Etsu, EUV optics from Zeiss, vacuum valves from VAT Group. None of these show up in keynote slides. Without them, ASML’s lithography machines don’t run and TSMC’s fabs don’t start wafers.
Layer 2 — equipment and substrates. ASML for EUV lithography, Applied Materials and Lam for deposition and etch, KLA for inspection, Ibiden and Unimicron for ABF substrates. This is the “heavy machinery” layer — capex cycles show up here first.
Layer 3 — where the H200 almost exists. TSMC fabs the GPU die on its N4 process. SK hynix (with some Samsung) stacks HBM3e. TSMC again runs CoWoS advanced packaging — the step that places the die and memory stacks on a silicon interposer so they behave like one unit. If you’ve never heard of CoWoS: it’s not marketing fluff. It’s why HBM sits close enough to the GPU to matter.
Layer 4 — the product you see. Nvidia’s brand, firmware, and the card your cloud provider buys. You never touch it in a datacenter, but this is what makes the financial news.
Three bottlenecks in a row
Supply-chain people like to argue about “the” bottleneck. For H200 there are three slow points in series — clearing one doesn’t ship a card if the other two are still backed up.
First, the GPU die at TSMC N4. Second, HBM3e — SK hynix leads, but 2026 HBM output has been widely reported as largely pre-sold across the big three memory makers. Third, CoWoS packaging at TSMC. Industry watchers often quote lead times in quarters, not weeks. Nvidia is also reported to hold a large share of CoWoS capacity — which helps Nvidia, and makes life harder for anyone else trying to launch competitive AI silicon on the same lines.
That’s why you can read about TSMC expanding CoWoS toward 120k–130k wafers a month by late 2026 and still see allocation fights. The front end (fabs) and the back end (packaging + memory) don’t move in sync. For years the glamour metric was the nanometer node. AI flipped attention to packaging density and memory bandwidth — the steps that used to be “someone else’s problem.”
31-supplier scoreboard
Not investment advice. Structural scores from mid-2026 research — no valuation.
Once you know the chain, it’s useful to ask who has leverage. We scored each of the 31 suppliers on a 100-point scale: AI/H200 exposure, moat and chokepoint power, growth leverage, whether you can actually invest in the name, and risk deductions. Not a buy list. No stock prices. Cymer (ASML subsidiary) has no separate score. Brooks Automation is counted inside Entegris.
What the scores reward
High scores go to companies that are hard to replace and clearly tied to this AI build-out. Nvidia tops the list because it owns demand and software lock-in, not because it owns fabs. TSMC ranks next because it makes the die and runs CoWoS — without both, H200 doesn’t ship. ASML is EUV monopoly: every leading-edge fab needs those machines. SK hynix leads HBM3e for this generation; memory is qualified per GPU, not swapped like commodity DRAM.
Synopsys, Lam, Applied Materials, and KLA score well as equipment and EDA oligopolies — critical, but more dispersed across the industry. Micron and Cadence land lower but still matter; they’re substitutes or second sources in parts of the stack.
Rankings that look wrong until they don’t
Samsung at 66 (#18) is the one that surprises people. Same industry, same HBM generation on the brochure — but qualification lag, yield noise, and a conglomerate where smartphones and appliances still dwarf AI memory in the P&L. SK hynix at 89 isn’t “a bit better”; it’s a different position in the queue.
Ajinomoto at 70 (#15) is the meme that checks out. The food company supplies ABF buildup film used in advanced chip substrates — high moat, tiny AI revenue slice. Zeiss SMT at 42 (#29) is the opposite problem: irreplaceable EUV optics, but not something you buy as a pure-play stock.
What to watch in earnings season
Nvidia guidance tells you demand. It doesn’t always tell you which link refused allocation. When headlines scream sold out, check CoWoS utilisation at TSMC, HBM mix at SK hynix, and whether delays are labelled “demand softness” or quietly pushed on packaging and memory.
- TSMC — CoWoS expansion and utilisation, not just wafer starts
- SK hynix / Samsung / Micron — HBM revenue share and yield on new stacks
- ASML — EUV order book (leading-edge capex pulse)
- Geography — fab and CoWoS in Taiwan, HBM in Korea, materials in Japan
The H200 will stay a Nvidia headline. Underneath, it’s a handful of companies that can say no — and a long tail of necessary parts nobody photographs. The scoreboard helps you see the handful. The chain is why the tail still matters.
The chain explains the delays. The scoreboard shows who can say no.
Sources
- Nvidia H200 product specifications
- Internal H200 Sankey supply-chain study (2026-06-16)
- Internal H200 supply-chain investment scores (2026-06-16)
- TSMC investor / CoWoS capacity commentary
- SK hynix HBM roadmap reporting
- Industry allocation trackers (TrendForce and peers)
For information only — this is not a recommendation to buy or sell any asset.
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